1. Field of the Invention
This invention is in the field of processing for printed wiring boards or printed circuit boards.
2. The Prior Art
The current method for fabrication of printed circuit boards is shown in FIG. 2. This method is complex and produces waste products which are difficult to treat and handle in an environmentally responsible manner. The byproducts of the standard process include solutions of tin, chelated copper, palladium, manganese, and cyanides, as well as expended surface oxide treatment solutions. Byproducts from the standard process may include lead.
The standard process as shown in FIG. 2 begins with a copper laminate board which is imaged at step 20' and which is developed, etched and stripped at step 30'. Next, each board is oxidized in an oxide step 35'. A plurality of boards are then pressed together in a press 40', drilled at step 50 and deburred at step 60'. In step 70', there is a desmear and etchback which is based upon potassium permanganate which produces manganese containing solutions as byproducts. The boards cleaned in the desmear/etchback are then processed by electroless copper surface to hole ratios at step 80. This step produces a formaldehyde and cheleated copper byproduct resulting in greater sludge and increased treatment efforts. At step 100', the boards are scrubbed.
The pressed and drilled board is then imaged again at step 20', developed, etched and stripped at step 30' in preparation for electroplating by the pattern plating method at step 110'. The pattern plated boards are then stripped at step 120', etched at step 130' and stripped at step 140'. Steps 110', 120', 130' and 140', produce tin and/or tin/lead containing solutions as byproducts. The chemistry of the step 120'-140' is complex and produces byproducts which are difficult to handle from an environmental standpoint.
In this standard process, there are two separate develop etch strip steps, a potassium permanganate process for desmear/etchback, and an electroless plating step for making holes receptive to plating.
The prior art includes plasma desmear/etchback as illustrated in U.S. Pat. Nos. 5,082,547, 4,676,865, and 4,012,307. The prior art also includes U.S. Pat. Nos. 4,684,560, and 4,619,741, which cover a process for depositing copper in drilled holes as used with this invention.
Finally, the process of panel electroplating is also well known in the printed circuit board manufacturing art. Applicant's invention consists of combining these technologies into an improved circuit board manufacturing method that is unique. Applicant has used an advanced simulation and modeling approach to optimize the printed circuit board manufacturing process and to minimize the waste generated by this processes. However, no one other than Applicant has selected the combination of process steps which provides the simplified operation in reduced number of process steps and reduced generation of environmentally dangerous byproducts.